搜索资源列表
PS2-IP-CORE-VHDL
- 一个PS2 IP CORE(VHDL) for FPGA
8051-vhdl-code
- 单片机8051 IP内核的VHDL源码，需要的开发环境QUARTUS II 6.0。
VHDLipcode
- VHDL IP CODE,资源多多共享!不亦乐乎!
USB 1.1 IP-CORE和设计范例 VHDL源代码
- USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
FFT变换的IP核的源代码 VHDL~
- FFT变换的IP核的源代码 VHDL~-FFT IP core of the source code for VHDL ~
经典高速乘法器IP
- 乘法器是硬件设计中的很常见也很重要的一个模块，它的VHDL硬件实现很好的解决了软件编程中做乘法速度慢的问题，在实时高速系统应用中或DSP软核或数字信号处理硬件实现算法中，经常能使用到乘法器，所以经典的高速乘法器IP 很有参考价值-Multiplier is a common and important module in hardware designing.Its VHDL addresses the low speed of multiplication in software progra
FFT-IP.介绍了基于FPGA的FFT实现方法
- 介绍了基于FPGA的FFT实现方法，并给出了实例程序，程序通过验证，可以直接使用,FPGA based on the realization of the FFT method, and gives examples of procedures, procedures for the adoption of authentication, can be directly used
Viterbi_IP.rar
- viterbi译码器的IP核，可以直接编译使用,viterbi decoder IP core, the compiler can directly use
sha1_v01.zip
- SHA-1加密算法的IP核，内涵文档，仿真测试文件,SHA-1 encryption algorithm of the IP core, the connotation of documents, simulation test file
USB.rar
- 用VHDL实现的USB IP核，大家可以参考下,Use VHDL to achieve USB IP core, we can refer to the following
uart8.zip
- 使用Libero提供的异步通信IP核实现UART通信，并附带仿真程序。UART设置为1位开始位，8位数据位，1位停止位，无校验。且UART发送自带2级FIFO缓冲，占用FPGA面积很小。,Libero provided the use of asynchronous communication IP core implementation UART communications, and incidental simulation program. UART is set to 1 to sta
CIC_deci4.rar
- cic抽取滤波器ip核，用于射频采样数字下变频模块的核心数字信号处理部分.此ip核已经过ise10.2验证,CIC decimation by 4 filter，used in Direct RF sampling of GPS signal. the core dsp block in a frondend design
Character_LCD.zip
- 这是一个 NIOSII系统的 1602LCD 控制IP核,This is a system NIOSII nuclear 1602LCD control IP
Altera_8051_IPcore_v1.2.rar
- Alera 的8051 IP core的示例文件5个,Alera the 8051 IP core of the sample file 5
SDCard_Controller.rar
- SD卡控制器IP. 兼容SD卡协议2.0。与wishbone bus 接口，方便与其他IP连接使用。 ,SD Card Controller IP. Compatible with SD Card Agreement 2.0. With the wishbone bus interface to facilitate the use of other IP connections.
DDS.rar
- 实现函数波形发生器的功能，内有用自己编的源代码实现的，也有用quartus的IP核实现的。,The realization of the function waveform generator function, useful for their own realization of the source code, it also uses the IP core quartus achieved.
can.rar
- can IP CORE .VERY GOOD AS A STUDY FILE,can IP CORE. VERY GOOD AS A STUDY FILE
oc_i2c_master.rar
- I2C core,经过验证可以在SOPC上运行的IP核,I2C core, verified SOPC can run on IP nuclear
Audio_Codec_WM8731.rar
- 这是一个控制WM8731的IP。通过SOPC直接可以挂在总线下。,This is a the WM8731 control IP. Can be linked through the SOPC directly under the bus.
DUC.rar
- 基于XILINX ISE下的数字上变频设计，其中用到了XILINX的乘法IP。已经通过工程实用，好用。,XILINX ISE based on frequency of figure design, use one of the XILINX multiplication IP. Has passed the project practical, easy to use.